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19-1353; Rev 0; 4/98
KIT ATION EVALU BLE AVAILA
Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD
General Description Features
o Dual Output Using a Single Inductor o Low-Noise Output, 30mVp-p Ripple o Output Voltages up to 24V and down to -9V (up to 45V and down to -16V with added components) o Internal Switches in a Small Package o 220kHz/400kHz Fixed-Frequency PWM Operation o Frequency Can Be Synchronized to External Clock o Power-OK Indicator o Selectable Power-On Sequencing o 0.1A Logic-Controlled Shutdown
MAX685
The MAX685 DC-DC converter provides low-noise dual outputs for powering CCD imaging devices and LCDs. This device uses a single inductor to provide independently regulated positive and negative outputs. Integrated power switches are included in the small 16-pin QSOP package (same size as an 8-pin SO) to save space and reduce cost. Each output delivers up to 10mA from a +2.7V to +5.5V input voltage range. Output voltages are set independently up to 24V and down to -9V. With a few additional low-cost components, the output voltages can be set at up to 45V and down to -16V. Output ripple magnitude is 30mVp-p. The MAX685 uses a fixed-frequency, pulsewidth-modulated (PWM) control scheme at 220kHz or 400kHz to permit output noise filtering and to reduce the size of external components. The frequency can also be synchronized to an external clock signal between 200kHz and 480kHz. The MAX685 has a power-OK indicator output (POK) that signals when both outputs are within regulation. A logic-controlled shutdown completely turns off both outputs and reduces supply current to 0.1A. The user can also set which output turns on first. The preassembled MAX685 evaluation kit is available to reduce design time.
Ordering Information
PART MAX685EEE TEMP. RANGE -40C to +85C PIN-PACKAGE 16 QSOP
Applications
Camcorders Digital Cameras Notebooks LCDs CCD Imaging Devices
INPUT 2.7V TO 5.5V
Typical Operating Circuit
VP
LXN
Pin Configuration
TOP VIEW
LXP 1 I.C. 2 VP 3 POK 4 SEQ 5 SHDN 6 SYNC 7 VDD 8 16 LXN 15 I.C. 14 PGND OPTIONAL POS 12 FBP 11 REF 10 FBN 9 GND POWER-OK INDICATOR NEG ON OFF
VDD FBP SHDN
POSITIVE OUTPUT UP TO 24V, 10mA
MAX685
SYNC LXP
MAX685
13 PGND SEQ FBN
NEGATIVE OUTPUT DOWN TO -9V, 10mA
POK
GND
REF
QSOP
I.C. = INTERNALLY CONNECTED
________________________________________________________________ Maxim Integrated Products
1
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Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD MAX685
ABSOLUTE MAXIMUM RATINGS
VDD, VP to GND........................................................-0.3V to +6V PGND to GND .......................................................-0.3V to +0.3V VDD to VP...............................................................-0.3V to +0.3V LXN, POK to GND ..................................................-0.3V to +30V LXP to VDD..............................................................-15V to +0.3V REF, SEQ, SHDN to GND...........................-0.3V to (VDD + 0.3V) FBP, FBN, SYNC to GND .........................................-0.3V to +6V Continuous Power Dissipation (TA = +70C) 16-Pin QSOP (derate 8.3mW/C above +70C)............667mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +165C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = VP = 5V, TA = 0C to +85C unless otherwise noted. Typical values are at TA = +25C.) PARAMETER Input Voltage Range Positive Output Voltage Range Negative Output Voltage Range Output Current LX Current Limit LXP, LXN On-Resistance Quiescent Current Idle Quiescent Current Line Regulation Load Regulation Output Voltage Ripple SHUTDOWN (SHDN) Shutdown Supply Current UNDERVOLTAGE LOCKOUT UVLO Threshold UVLO Hysteresis REFERENCE VOLTAGE VREF Output Voltage VREF Load Regulation FB INPUTS FBP Threshold Voltage FBN Threshold Voltage FBP, FBN Input Leakage Current LOGIC INPUTS (SEQ, SHDN, SYNC) Logic-Low Input Logic-High Input Input Bias Current 2.7V < VDD < 5.5V 2.7V < VDD < 5.5V 0.7 x VDD 0.1 1 0.3 x VDD V V A No load No load 1.21 -16 1.24 10 0.01 1.27 36 0.1 V mV A No load 0 < IREF < 50A 1.23 1.250 -2 1.27 V mV VDD = rising 2.35 2.5 50 2.65 V mV SYNC = SEQ = SHDN = GND 0.1 10 A VDD = 5.5V (Note 1) VDD = 4.5V, VOUT+ 14.25V, VOUT- -7.125V, Figure 3 TA = +25C VDD = 4.5V SYNC = VDD VFBP = 1.35V, VFBN = -0.1V VDD = 4.5V to 5.5V IOUT = 0 to 10mA, C1 = 10F C3 = C4 = 10F, ILOAD = 5mA VDD = VP CONDITIONS MIN 2.7 VP -9 10 440 0.6 0.8 300 0.2 0.13 30 500 2 TYP MAX 5.5 24 -1.27 UNITS V V V mA mA mA A %/V %/mA mVp-p
2
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Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD
ELECTRICAL CHARACTERISTICS (continued)
(VDD = VP = 5V, TA = 0C to +85C unless otherwise noted. Typical values are at TA = +25C.) PARAMETER SYNC INPUT Sync Frequency Range (external) Oscillator Frequency (internal) POK COMPARATORS FBP POK Threshold FBN POK Threshold POK Output Low Voltage POK Output Off Current FBP rising FBN falling IPOK = 2mA VPOK = 10V 1.090 54 1.122 79 1.150 108 0.4 1 V mV V A SYNC = GND SYNC = VDD 200 175 320 220 400 480 265 480 kHz kHz CONDITIONS MIN TYP MAX UNITS
MAX685
ELECTRICAL CHARACTERISTICS
(VDD, VP = 5V, TA = -40C to +85C unless otherwise noted.) (Note 2) PARAMETER Input Voltage Range Positive Output Voltage Range Negative Output Voltage Range Maximum Output Current Idle Quiescent Current SHUTDOWN Shutdown Supply Current UNDERVOLTAGE LOCKOUT UVLO Threshold FBP Threshold Voltage FBN Threshold Voltage VREF Output Voltage LOGIC INPUTS (SEQ, SHDN, SYNC) Logic-Low Input Logic-High Input POK COMPARATORS FBP POK Threshold FBN POK Threshold FBP rising FBN falling 1.090 54 1.150 108 V mV 2.7V < VDD 5.5V 2.7V < VDD 5.5V 0.7 x VDD 0.3 x VDD V V VDD = rising No load No load No load 2.35 1.205 -20 1.225 2.65 1.275 40 1.275 V V mV V FB INPUTS AND REFERENCE VOLTAGE SYNC = SEQ = SHDN = GND 10 A VDD = 5.5V (Note 1) VIN = 4.5V, VOUT+ 14.25V, VOUT- -7.125V, Figure 3 SYNC = GND VDD = VP CONDITIONS MIN 2.7 VP -9 10 500 MAX 5.5 24 -1.27 UNITS V V V mA A
Note 1: Negative output voltage can be larger magnitude for lower values of VDD. The voltage between VDD and VOUT- must not exceed 14.5V. Note 2: Specifications to -40C are guaranteed by design, not production tested.
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Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD MAX685
Typical Operating Characteristics
(Circuit of Figure 3, VOUT+ = 15V, VOUT- = -7.5V, TA = +25C, unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT (POSITIVE OUTPUT LOADED)
MAX685-01
EFFICIENCY vs. LOAD CURRENT (NEGATIVE OUTPUT LOADED)
MAX685-02
EFFICIENCY vs. LOAD CURRENT (BOTH OUTPUTS LOADED)
85 80 EFFICIENCY (%) 75 70 65 60 55 50 VIN = 5.0V VIN = 3.3V
MAX685-03
90 VIN = 5.0V EFFICIENCY (%) 80 VIN = 3.3V
85 VIN = 5.0V 80 75 EFFICIENCY (%) 70 65 60 55 VIN = 3.3V
90
70
60 0 2 4 6 8 10 LOAD CURRENT (mA)
50 0 1 2 3 4 5 6 7 8 9 10 LOAD CURRENT (mA)
0
2
4
6
8
10
LOAD CURRENT (mA)
NO-LOAD CURRENT vs. INPUT VOLTAGE
MAX685-04
REFERENCE LOAD REGULATION
MAX685-06
2.0
1.250
NO-LOAD CURRENT (mA)
1.5
REFERENCE VOLTAGE (V)
1.0
1.249
0.5
0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 INPUT VOLTAGE (V)
1.248 0 5 10 15 20 25 30 35 40 45 50 LOAD CURRENT (A)
LX SWITCHING FREQUENCY vs. INPUT VOLTAGE
MAX865-07
REFERENCE VOLTAGE vs. TEMPERATURE
MAX685-13
250 240 OSCILLATOR FREQUENCY (kHz) 230
1.254 1.252 REFERENCE VOLTAGE (V) 1.250 1.248 1.246 1.244 1.242 1.240 VIN = 3.3V VIN = 5.0V
220 210 200 190 180 170 160 150 2.7 3.2 3.7 4.2 4.7 5.2 5.7 INPUT VOLTAGE (V) SYNC = VDD
-40
-20
0
20
40
60
80
100
TEMPERATURE (C)
4
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Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD
Typical Operating Characteristics (continued)
(Circuit of Figure 3, VOUT+ = 15V, VOUT- = -7.5V, TA = +25C, unless otherwise noted.)
MAX685
VOUT+ LOAD-TRANSIENT RESPONSE
MAX685-08
VOUT- LOAD-TRANSIENT RESPONSE
-1mA IOUT-11mA
MAX685-09
11mA IOUT+ 1mA
5mA/div
5mA/div
100mV/div 100mV/div VOUT+ VOUT-
2ms/div
2ms/div
LINE-TRANSIENT RESPONSE
MAX685-10
100mV/div
VOUT+
100mV/div
VOUT-
2V/div
VDD, VP
1ms/div INPUT 4V TO 5V, +15V AT 10mA, -7.5V AT 10mA
START-UP (SEQ = HIGH)
MAX685-12
START-UP (SEQ = LOW)
MAX685-11
VOUT+ 5V/div
5V/div
VOUT+
5V/div
VOUT-
5V/div VOUT-
2ms/div START-UP, SEQ = HIGH, VDD = VP = 5.0V, +15V AT 10mA, -7.5V AT 10mA
2ms/div START-UP, SEQ = LOW, VDD = VP = 5.0V, +15V AT 10mA, -7.5V AT 10mA
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Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD MAX685
Pin Description
PIN 1 2, 15 3 4 5 6 7 8 9 10 11 12 13, 14 16 NAME LXP I.C. VP POK SEQ SHDN SYNC VDD GND FBN REF FBP PGND LXN FUNCTION P-Channel Switching Inductor Node. LXP turns off when the part enters shutdown. Internally Connected. Do not externally connect. Power Input. Connect to VDD. Open-Drain Power-OK Output. POK is high when both outputs are in regulation. Connect POK to VDD with a 100k pull-up resistor to VDD. Power-Up Sequence Select Input. Connect SEQ to GND to power the negative output voltage first. Connect SEQ to VDD to power the positive output first. Shutdown Input. Both outputs go to 0V in shutdown. Connect to VDD for automatic startup. Sync Input. This pin synchronizes the oscillator to an external clock frequency between 200kHz and 480kHz. Connect SYNC to GND (220kHz) or VDD (400kHz) for internal oscillator frequency. Supply Input. Bypass VDD with a 1.0F or greater ceramic capacitor to GND. Ground Feedback Input for the Negative Output Voltage. Connect a resistor-divider between the negative output and REF with the center to FBN to set the negative output voltage. 1.25V Reference Voltage Output. Bypass with 0.22F to GND. Feedback for the Positive Output Voltage. Connect a resistor-divider between the positive output and GND with the center to FBP to set the positive output voltage. Power Ground. Connect PGND to GND. N-Channel Switching Inductor Node. LXN pulls to GND through the internal transistor when the part is shut down.
_______________Detailed Description
The MAX685 DC-DC converter accepts an input voltage between +2.7V and +5.5V and generates both a positive and negative voltage, using a single inductor (Figure 1). It alternates between acting as a step-up converter and as an inverting converter on a cycle-by-cycle basis. Both output voltages are independently regulated. Each output is separately controlled by a pulse-widthmodulated (PWM) current mode regulator. This allows the part to operate at a fixed frequency for use in noisesensitive applications. An internal oscillator runs at 220kHz or 400kHz, or can be synchronized to an external signal. Since switching alternates between the two regulators, each operates at half the oscillator frequency (110kHz, 200kHz, or half the sync frequency). The oscillator can be synchronized to a 200kHz to 480kHz clock. On the first cycle of operation, the part operates as a step-up converter. LXP connects to VDD, LXN pulls to ground, and the inductor current rises. Once the induc6
tor current rises to a level set by the positive-side error amplifier, LXN releases and the inductor current flows through D2 to the positive output. When the inductor current drops to zero (which happens each cycle under normal, discontinuous operation), LXN returns to the input voltage. On the second cycle, LXN is held at ground. LXP is pulled up to the input voltage until the current reaches the limit set by the negative error amplifier. Then LXP is released and the inductor current flows through D1 to the negative output. Once the inductor current reaches zero, the voltage at LXP returns to ground. The waveforms at LXN and LXP are shown in Figure 2 for a typical pair of cycles. The current into the LXN pin is sensed to measure the inductor current. The MAX685 controls the inductor current to regulate both the positive and negative output voltages.
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Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD MAX685
TO VOUTPOK VDD VP
MAX685
FBN NEGATIVE ERROR AMP P LXP POSITIVE ERROR AMP CONTROL LOGIC VOUT+ LXN N REF 1.25V REF GND SYNC SEQ SHDN PGND D2 D1 VOUT-
TO VOUT+
FBP
Figure 1. Functional Diagram
+15V
LXN 0V +5V LXP 0V
are in regulation. When both outputs are within 90% of their regulation points, POK becomes high impedance. Should one or both of the output voltages fall below 90% of their regulation points, POK pulls to ground. POK can sink up to 2mA. To reduce current consumption, POK is high impedance while the part is in shutdown. When coming out of shutdown, POK remains high impedance for 50ns (typ) before going low. Connect POK to VDD through a 100k resistor.
Synchronization/Internal Frequency Selection
The MAX685 operates at a fixed switching frequency. Set the operating frequency using the SYNC pin. If SYNC is grounded, the part operates at the internally set 220kHz frequency. When SYNC is connected to VDD, the part operates at 400kHz. The MAX685 can also be synchronized to signals between 200kHz and 480kHz. Note that each output switches at half the oscillator or synchronized frequency. Since the actual switching frequency is one-half the applied clock signal, drive SYNC at twice the desired switching frequency.
-7.5V
Figure 2. LXN and LXP Waveforms (see also Figure 5)
SEQ and Power OK (POK)
The SEQ pin controls the power-up sequence. If SEQ is low, the positive output is disabled until the negative output is within 90% of its regulation point. If SEQ is high, the negative output is disabled until the positive output is within 90% of its regulation point. The powerOK output (POK) indicates that both output voltages
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Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD MAX685
Applications Information
Figure 3 shows the standard application circuit for the MAX685. The values shown in Table 1 will work well for output currents up to 10mA. However, this circuit can be optimized to a particular application by using different capacitors and a different inductor. Small inductors are typically preferred because of compact design and low cost. Murata LHQ and TDK NLC types are examples of small surface-mount inductors that work for most applications. Because these small-size inductors use thinner wire, they exhibit higher resistance and have greater losses than larger ones. If the application demands higher efficiency, use larger, lower resistance coils such as the Sumida CD43 or CD54, Coilcraft DT1608 or DO1608, or Coiltronics UP1V series.
Higher Output Voltages
If the application requires output voltages greater than -7.5V or +24V, use the circuit of Figure 4. This circuit uses a charge pump to increase the output voltage without increasing the voltage stress on the LX_ pin. The maximum output voltages of the circuit in Figure 4 are -15V and +48V. The voltage rating on D2, D5, and D6 must be 30V or greater. For a larger negative output voltage without a larger positive output (or vice versa), use one-half of the Figure 4 circuit with one-half of the Figure 3 circuit.
Inductor Selection A 22H inductor is suitable for most applications. Larger inductances will reduce inductor ripple current and output voltage ripple, but they also typically require larger physical size if increased resistance and losses are not also allowed.
Filter Capacitor Selection The output ripple voltage is a function of the peak inductor current, frequency, and type and value of the output capacitors. Capacitors with low equivalentseries resistance (ESR) and large capacitance reduce output ripple. Typically, tantalum or ceramic capacitors are optimal. Tantalum capacitors have higher ESR and higher capacitance than ceramic capacitors. Therefore the ESR of tantalum capacitors determines the output ripple, because at the frequencies used the ESR dominates the impedance of the capacitor. If ceramic capacitors are used, the capacitance determines the output ripple.
VIN C1 10F C2 0.22F R4 124k 11 3 8 VDD POK 4 POK
VIN C1 10F
R5 100k REF VP
R5 100k 11 3 8 VDD POK 4 POK SHDN SYNC REF VP R4
C2 0.22F
MAX685 SHDN 6
SYNC 7 12 C5 47pF
SHDN SYNC
10
MAX685 SHDN 6
SYNC FBN FBP 7 12
10
FBN
FBP
R3 750k -7.5V VOUTC3 2.2F
LXP GND PGND LXN 9 13, 14 16 1
R1 1.0M
R2 90.9k
R3
C6 1F
LXP GND PGND LXN 1 9 13, 14 16 C8 1F
R2 R1 C5 47pF
+15V VOUT+ D1 NBR0520 L1 22H D2 NBR0520 C4 2.2F
VOUTD3 C7 2.2F D4 C3 2.2F D1 L1 22H D2 C4 2.2F D5 D6 C9 2.2F
VOUT+
Figure 3. Standard Application Circuit
8
Figure 4. Circuit for Output Voltages < -9V and > +24V
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Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD
Table 1. Component Values for the Typical Operating Circuit
REF C1 C2 C3, C4 C5 D1, D2 DESCRIPTION 10F, 10V tantalum cap 0.22F ceramic capacitor 2.2F ceramic capacitor 47pF ceramic cap 0.1A, 20V Schottky rectifier 22H, 0.4A inductor MANUFACTURER PART NUMBER Sprague 595D106X0010A2T or AVX TAJA106K010R Any manufacturer Any manufacturer Any manufacturer Motorola MBR0520LT1 (0.5A) or Central Semiconductor CMPSH-3 Murata LHQ4N220J04 or TDK NLC32522T-220K
LXP LXN +5V 0V +5V 0V -7.5V +15V
Damping LX
LXN and LXP may ring at the conclusion of each switching cycle when the inductor current falls to zero. Typically the ringing waveform appears only on LX_ and has no effect on output ripple and noise. If LX_ ringing is still objectionable, it may be damped by connecting a series RC in parallel with L1. Typically 1k in series with 100pF provides good damping with only 3% efficiency degradation. See Figure 5.
MAX685
L1
Setting the Output Voltage
The resistor-divider formed by R4 and R3 sets the negative output voltage; the resistor-divider formed by R1 and R2 sets the positive output voltage. Let R4 be a value near 100k to set a resistor-divider current of approximately 10A. Determine the value of R3 by the following: R 3 = R4 VOUT - 1.24 V
Figure 5. LXN and LXP Waveforms with a Series-Connected 1k Resistor and 100pF Capacitor Connected in Parallel with L1 to Damp Ringing
Let R2 be a value near 100k to set a resistor-divider current of approximately 10A. Determine the value of R1 with the following formula: R1 = R2 x (VOUT+ - 1.24V) / 1.24
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Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD MAX685
___________________Chip Information
TRANSISTOR COUNT: 902 SUBSTRATE CONNECTED TO GND
Package Information
QSOP.EPS
10
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Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD
NOTES
MAX685
11
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Dual-Output (Positive and Negative), DC-DC Converter for CCD and LCD MAX685
NOTES
12
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